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Loader:raw Filesys:raw Dev:flash0.runtime1 File: Options:(null)
Loading: .... 3182154 bytes read
Entry at 0x00008000
Closing network.
Starting program at 0x00008000
[    0.000000] Booting Linux on physical CPU 0x0
[    0.000000] Linux version 6.6.72 (kali@kali) (arm-openwrt-linux-muslgnueabi-5
[    0.000000] CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=10c5387d
[    0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instructie
[    0.000000] OF: fdt: Machine model: Meru AP822i
[    0.000000] Memory policy: Data cache writealloc
[    0.000000] Hit pending asynchronous external abort (FSR=0x00001c06) during .
[    0.000000] Zone ranges:
[    0.000000]   Normal   [mem 0x0000000000000000-0x0000000007ffffff]
[    0.000000]   HighMem  [mem 0x0000000008000000-0x000000009fffffff]
[    0.000000] Movable zone start for each node
[    0.000000] Early memory node ranges
[    0.000000]   node   0: [mem 0x0000000000000000-0x0000000007ffffff]
[    0.000000]   node   0: [mem 0x0000000088000000-0x000000009fffffff]
[    0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x000000009fffffff]
[    0.000000] percpu: Embedded 12 pages/cpu s17556 r8192 d23404 u49152
[    0.000000] Kernel command line: console=ttyS0,115200 root=/dev/mtdblock5
[    0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes, l)
[    0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes, lin)
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 130784
[    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[    0.000000] Memory: 508316K/524288K available (7163K kernel code, 594K rwdat)
[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
[    0.000000] rcu: Hierarchical RCU implementation.
[    0.000000]  Tracing variant of Tasks RCU enabled.
[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10 ji.
[    0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
[    0.000000] L2C: DT/platform modifies aux control register: 0x0a130000 -> 0x0
[    0.000000] L2C-310 enabling early BRESP for Cortex-A9
[    0.000000] L2C-310 full line of zeros enabled for Cortex-A9
[    0.000000] L2C-310 ID prefetch enabled, offset 1 lines
[    0.000000] L2C-310 dynamic clock gating enabled, standby mode enabled
[    0.000000] L2C-310 cache controller enabled, 16 ways, 256 kB
[    0.000000] L2C-310: CACHE_ID 0x410000c8, AUX_CTRL 0x7e530001
[    0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
[    0.000002] sched_clock: 64 bits at 500MHz, resolution 2ns, wraps every 4398s
[    0.000022] clocksource: arm_global_timer: mask: 0xffffffffffffffff max_cycls
[    0.000045] Switching to timer-based delay loop, resolution 2ns
[    0.000346] Calibrating delay loop (skipped), value calculated using timer f)
[    0.000360] CPU: Testing write buffer coherency: ok
[    0.000386] CPU0: Spectre v2: using BPIALL workaround
[    0.000392] pid_max: default: 32768 minimum: 301
[    0.005974] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, line)
[    0.005988] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes,)
[    0.011166] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[    0.012083] RCU Tasks Trace: Setting shift to 1 and lim to 1 rcu_task_cb_adj.
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